Method and apparatus to prevent laser kink failures

ABSTRACT

Systems, devices, methods, and computer-readable media for preventing laser kink failures. A laser diode device can include one or more laser diodes configured to emit electromagnetic radiation coherently. The laser diode device can also include one or more submounts upon which the one or more laser diodes are mounted. The one or more submounts can include one or more through vias including one or more fill materials different from a material of the one or more submounts. Further, one or more properties of the one or more through vias in the one or more submounts can be selected to reduce an amount of mismatch between an effective coefficient of thermal expansion of the one or more laser diodes and an effective coefficient of thermal expansion of the one or more submounts.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. application Ser. No.15/852,475, filed on Dec. 22, 2017, the entire contents of which areincorporated herein by reference.

TECHNICAL FIELD

The present technology pertains to preventing laser kink failures and inparticular to reducing an amount of bow that occurs in laser diodes as aresult of cooling the laser diodes after mounting the diodes to asubmount in order to reduce occurrences of kink failures in the diodes.

BACKGROUND

Currently, laser diodes are mounted to submounts and then cooled as partof manufacturing devices with the laser diodes. This is problematicbecause as the diodes and submounts are cooled, as part of bonding thediodes to the submounts, bow is created in the diodes. In particular,bow is created in the diodes as a result of differences in effectivecoefficients of thermal expansion between the diodes and the submounts.As a result, bow in the diodes can distort grating of the laser diodescausing phase shifting of electromagnetic radiation emitted by thediodes. Shifting phases in electromagnetic radiation output by thediodes can reduce a level of coherence of the electromagnetic radiationemitted by the diodes, thereby resulting in kink failures in the diodes.In particular, grating distortion in the laser diodes can increase arange of wavelengths of emitted electromagnetic radiation of the diodes,thereby decreasing coherence of the emitted radiation. Decreasingcoherence of emitted radiation of the diodes can subsequently lead tokink failure in the diodes.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to describe the manner in which the above-recited and otheradvantages and features of the disclosure can be obtained, a moreparticular description of the principles briefly described above will berendered by reference to specific embodiments thereof which areillustrated in the appended drawings. Understanding that these drawingsdepict only exemplary embodiments of the disclosure and are nottherefore to be considered to be limiting of its scope, the principlesherein are described and explained with additional specificity anddetail through the use of the accompanying drawings in which:

FIG. 1 shows an example topological profile illustrating bow observed ina laser diode after the manufacturing process of bonding the laser diodeto a submount;

FIG. 2 depicts a cross-sectional view of a laser diode subassembly;

FIG. 3 shows a view of a submount;

FIG. 4 shows a view of another submount;

FIG. 5 shows a graph of normalized bow observed in laser diodesubassemblies as a function of CTE ratio;

FIG. 6 illustrates a flowchart for an example method of manufacturinglaser diode assemblies that reduces chances of introducing kink failurein the laser diodes;

FIG. 7 illustrates a flowchart for an example method of developing afinite element analysis model used to reduce an amount of bow introducedin laser diodes of laser diode subassemblies through manufacturing ofthe subassemblies; and

FIG. 8 illustrates an example computing device in accordance withvarious embodiments.

DESCRIPTION OF EXAMPLE EMBODIMENTS

Various embodiments of the disclosure are discussed in detail below.While specific implementations are discussed, it should be understoodthat this is done for illustration purposes only. A person skilled inthe relevant art will recognize that other components and configurationscan be used without parting from the spirit and scope of the disclosure.Thus, the following description and drawings are illustrative and arenot to be construed as limiting. Numerous specific details are describedto provide a thorough understanding of the disclosure. However, incertain instances, well-known or conventional details are not describedin order to avoid obscuring the description. References to one or anembodiment in the present disclosure can be references to the sameembodiment or any embodiment; and, such references mean at least one ofthe embodiments.

Reference to “one embodiment” or “an embodiment” means that a particularfeature, structure, or characteristic described in connection with theembodiment is included in at least one embodiment of the disclosure. Theappearances of the phrase “in one embodiment” in various places in thespecification are not necessarily all referring to the same embodiment,nor are separate or alternative embodiments mutually exclusive of otherembodiments. Moreover, various features are described which can beexhibited by some embodiments and not by others.

The terms used in this specification generally have their ordinarymeanings in the art, within the context of the disclosure, and in thespecific context where each term is used. Alternative language andsynonyms can be used for any one or more of the terms discussed herein,and no special significance should be placed upon whether or not a termis elaborated or discussed herein. In some cases, synonyms for certainterms are provided. A recital of one or more synonyms does not excludethe use of other synonyms. The use of examples anywhere in thisspecification including examples of any terms discussed herein isillustrative only, and is not intended to further limit the scope andmeaning of the disclosure or of any example term. Likewise, thedisclosure is not limited to various embodiments given in thisspecification.

Without intent to limit the scope of the disclosure, examples ofinstruments, apparatus, methods and their related results according tothe embodiments of the present disclosure are given below. Note thattitles or subtitles can be used in the examples for convenience of areader, which in no way should limit the scope of the disclosure. Unlessotherwise defined, technical and scientific terms used herein have themeaning as commonly understood by one of ordinary skill in the art towhich this disclosure pertains. In the case of conflict, the presentdocument, including definitions will control.

Additional features and advantages of the disclosure will be set forthin the description which follows, and in part will be obvious from thedescription, or can be learned by practice of the herein disclosedprinciples. The features and advantages of the disclosure can berealized and obtained by means of the instruments and combinationsparticularly pointed out in the appended claims. These and otherfeatures of the disclosure will become more fully apparent from thefollowing description and appended claims, or can be learned by thepractice of the principles set forth herein.

OVERVIEW

A laser diode device can include one or more laser diodes configured toemit electromagnetic radiation coherently. The laser diode device canalso include one or more submounts upon which the one or more laserdiodes are mounted. The one or more submounts can include one or morethrough vias including one or more fill materials different from amaterial of the one or more submounts. Further, one or more propertiesof the one or more through vias in the one or more submounts can beselected to reduce an amount of mismatch between an effectivecoefficient of thermal expansion of the one or more laser diodes and aneffective coefficient of thermal expansion of the one or more submounts.

A method can include identifying one or more submounts and one or morelaser diodes to mount to the one or more submounts. One or moreproperties of one or more through vias including one or more fillmaterials different from a material of the one or more submounts can beselected to reduce an amount of mismatch between an effectivecoefficient of thermal expansion of the one or more submounts and aneffective coefficient of thermal expansion of the one or more laserdiodes. The one or more submounts can be fabricated according to the oneor more properties of the one or more through vias including the one ormore fill materials selected to reduce the amount of mismatch betweenthe effective coefficient of thermal expansion of the one or more laserdiodes and the effective coefficient of thermal expansion of the one ormore submounts. Subsequently, the one or more laser diodes can bemounted to the one or more submounts.

A method can include observing amounts of bow in a laser diode submountassembly lacking through vias in a submount of the laser diode assemblyand laser diode submount assemblies with submounts including throughvias with fill materials having varying through via properties. A finiteelement analysis model of an amount of bow in a laser diode as afunction of an amount of mismatch between effective coefficients ofthermal expansion of the laser diode and a submount can be developed.The model can be developed using the amounts of bow observed in thelaser diode submount assembly lacking through vias in the submount ofthe laser diode submount assembly and the laser diode submountassemblies having the submounts with the through vias including the fillmaterials having the varying through via properties. Subsequently, themodel can be used for selecting one or more properties of one or morethrough vias in one or more submounts configured to receive one or morelaser diodes mounted thereon to reduce an amount of mismatch between aneffective coefficient of thermal expansion of the one or more laserdiodes and an effective coefficient of thermal expansion of the one ormore submounts.

EXAMPLE EMBODIMENTS

The disclosed technology addresses the need in the art for preventinglaser diode kink failure. The present technology involves system,methods, and computer-readable media for preventing bow in laser diodesduring manufacturing to prevent laser kink failure. In particular, thepresent technology involves systems, methods, and computer-readablemedia for reducing a mismatch between an effective coefficient ofthermal expansion of a laser diode and an effective coefficient ofthermal expansion of a submount upon which the laser diode is mountedduring manufacturing in order to reduce bow in the laser diode duringmanufacturing, and subsequently reducing the chances of kink failureoccurring in the laser diode.

The present technology will be described in the following disclosure asfollows. The discussion begins with an introductory discussion of kinkfailure and bow in laser diodes, as shown in FIG. 1. A discussion ofexample systems and methods for reducing chances of kink failure beingintroduced during manufacturing, as illustrated in FIGS. 2-7, will thenfollow. A discussed of example computing devices, as illustrated in FIG.8, will then follow. The disclosure now turns to an introductorydiscussion of kink failure in laser diodes.

Laser diodes have been developed to emit coherent electromagneticradiation across a wide range of wavelengths in the electromagneticspectrum, including both the visible and invisible spectrums.Accordingly, laser diodes are used in a wide variety of applications.For example, laser diodes can be used in fiber optic communicationdevices, barcode readers, laser pointers, disc readers and recorders,laser printing devices, laser scanning devices, Internet of things(herein referred to as “IoT”) devices, and other applicable photonicdevices.

In manufacturing laser diode subassemblies for devices and systems, thelaser diodes are mounted to submounts. The submounts can be included aspart of a printed circuit board that is used to provide input and powerfor operating the laser diodes. Typically laser diodes are bonded tosubmounts using a solder material. For example, an AuSn solder can beused to bond laser diodes to submounts. In typical processes of bondinglaser diodes to submounts using a solder material, the solder material,e.g. solder paste, is disposed on the submounts. The laser diodes arethen placed on the submounts at positions where the solder material isdisposed, e.g. using a pick-and-place method. After the laser diodes areplaced on the submounts, the solder material, along with both the laserdiodes and the submounts, are heated in order to melt the soldermaterial. Subsequently, the solder material, the laser diodes, and thesubmounts are cooled in order to re-solidify the solder material, tobond the laser diodes to the submounts.

Submounts are usually fabricated from Silicon. In particular, submountsare usually fabricated from Silicon as a result of its vast use andwide-spread adoption in the semiconductor industry. Silicon submountsused in mounting laser diodes can also incorporate other circuitcomponents or be integrated as part of a printed circuit boardincorporating other circuit components. For example, Silicon submountscan include power amplifiers mounted to the submounts that are used inamplifying power signals for laser diodes mounted to the submounts.While submounts are described herein with reference to Silicon,submounts for receiving laser diodes can be fabricated from anapplicable material, e.g. AlN.

Kink failure is a common failure mode of laser diode subassemblies thatis caused during the manufacturing of the laser diode subassemblies. Inturn, kink failure can decrease production yields of laser diodesubassemblies. For example, 8% of a total production yield of laserdiodes bonded to a Si submount using AuSn solder paste can exhibit kinkfailure. Kink failure can be caused by warping and bending of laserdiodes, otherwise referred to as bow in the laser diodes, occurringduring manufacturing. More specifically, warping and bending of laserdiodes can cause bending of laser grating included as part of laserdiodes in a laser diode subassembly. Subsequently, bending of lasergrating of laser diodes can phase shift an electromagnetic radiationoutput of the laser diodes resulting in kink failures in the laserdiodes.

Mismatches between an effective coefficient of thermal expansion of asubmount and an effective coefficient of thermal expansion of a laserdiode can cause warping and bending within the laser diode duringmanufacture of a laser diode subassembly. An effective coefficient ofthermal expansion of a submount and a laser diode, as used herein,includes an overall coefficient of thermal expansion of the submount andthe laser diode based on thermal expansion coefficients of materials orparts of the submount and the laser diode. For example, if a submountincludes two separate materials with different thermal expansioncoefficients, then an effective coefficient of thermal expansion of thesubmount can be an average of the thermal expansion coefficients of thematerials. An effective coefficient of thermal expansion coefficient ofa laser diode and a submount can depend on volumes of differentmaterials or parts in the submount and the laser diode. For example, ifa first material in a laser diode forms 90% of the laser diode and asecond material only forms 10% of the laser diode, then a coefficient ofthermal expansion of the first material can contribute more greatly toan effective coefficient of the laser diode than a coefficient ofthermal expansion of the second material.

Further, mismatches between an effective coefficient of thermalexpansion of a submount and an effective coefficient of thermalexpansion of a laser diode can cause warping and bending within thelaser diode when the subassembly is cooled down during the process ofmounting laser diode to the submount. More specifically, mismatchesbetween effective coefficients of thermal expansion can lead to bow inthe laser diode as the laser diode and a submount, forming at least partof a laser diode subassembly, are cooled after solder is heated as partof bonding the diode to the submount. For example, an InP laser diode,having an effective coefficient of thermal expansion of 4.6 ppm/K can bepicked and placed on a Si submount having an effective coefficient ofthermal expansion of 2.6 ppm/K. The laser diode subassembly can then beheated to around 280° C. during a ramp up and dwelling period to meltAuSn solder paste disposed on the submount. Subsequently, the laserdiode subassembly can be cooled to room temperature during which thedifference in the effective coefficients of thermal expansion betweenthe laser diode and submount can cause bow in the laser diode. Morespecifically, the laser diode can shrink more than the submount duringthe cooling process to cause the laser diode to bow.

FIG. 1 shows an example topological profile 100 illustrating bowobserved in a laser diode across a length of the laser after themanufacturing process of bonding the laser diode to a submount. Thetopological profile 100 shown in FIG. 1 can correspond to an InP laserdiode bonded to a Silicon submount using AuSn solder paste through thepreviously described process of manufacturing a laser subassembly. Asshown in FIG. 1, bow is observed across the entire length of the laserdiode. Additionally, the greatest amount of bow, around 0.25 μm isobserved towards the center of the laser diode.

Accordingly there exists a need for mechanisms and methods of reducingkink failure occurring in laser diodes as a result of manufacturinglaser diode subassemblies. More specifically, there exists a need formechanisms and methods for reducing an amount of mismatch betweeneffective coefficients of thermal expansion of laser diodes andsubmounts to reduce an amount of bow in the laser diodes as a result ofmanufacturing laser diode subassemblies. Further, as laser diodesubassemblies are typically manufactured using Silicon wafers andcorresponding Silicon processing techniques, there exists a need formechanisms and methods for reducing kink failure using Silicon wafersand corresponding Silicon processing techniques.

An amount of bow introduced in a laser diode during cooling of a laserdiode subassembly can depend on dimensions of the laser diode.Specifically, as bow increases towards a center of a laser diode, e.g.as shown in FIG. 1, longer laser diodes can exhibit greater amounts ofbow than shorter laser diodes. This is problematic as it can be morebeneficial to utilize larger laser diodes in laser diode assemblies. Forexample, larger laser diodes can accumulate more power to form a beam ofcoherent electromagnetic radiation for use in applications that requirelarger electromagnetic radiation intensities. Accordingly, there furtherexists a need to reduce an amount of bow and subsequent chances of kinkfailure caused in laser diodes through laser diode subassemblyfabrication.

FIG. 2 depicts a cross-sectional view of a laser diode subassembly 200.The laser diode subassembly 200 includes a submount 202 and a laserdiode 204. The laser diode 204 is secured to the submount 202 through anapplicable attachment mechanism, e.g. using solder paste. Further, thelaser diode 204 can be mounted to the submount 202 through an applicablemanufacturing process, such as the previously described processes formounting a laser diode to a submount as part of manufacturing a laserdiode subassembly. For example, solder paste can be disposed between thesubmount 202 and the laser diode 204. Further in the example, the laserdiode subassembly 200 can be heated and cooled to melt and solidify thesolder paste in order to secure the laser diode 204 to the submount 202.

The laser diode subassembly 200 includes a first though via 206-1 and asecond through via 206-2 (herein referred to as “through vias 206”).While multiple through vias 206 are shown in the submount 202 of theexample laser subassembly 200 shown in FIG. 2, in certain embodimentsthe submount 202 can include only a single through via. The through vias206 are configured to reduce a mismatch between an effective coefficientof thermal expansion of the submount and an effective coefficient ofthermal expansion of the laser diode 204. Reduction of a mismatchbetween effective coefficients of thermal expansion, as user herein, ismade with reference to a laser diode subassembly including a submountthat lacks through vias. Specifically, the through vias 206 can reduce amismatch between effective coefficients of thermal expansion of thesubmount 202 and the laser diode 204 in comparison to a laser diodesubassembly with a submount lacking through vias.

In reducing a mismatch between effective coefficients of thermalexpansion of the submount 202 and the laser diode 204, the through vias206 can reduce chances of kink failure occurring during manufacturing ofthe laser diode subassembly 200. Further, in reducing mismatches ineffective coefficient of thermal expansion, the through vias 206 canreduce an amount of warping and subsequent bow in the laser diode 204created during manufacturing of the laser diode subassembly 200. Morespecifically, the through vias 206 can reduce an amount of warping thatoccurs in the laser diode 204 when the laser diode subassembly 200 iscooled as part of mounting the laser diode 204 to the submount 202 tomanufacture the laser diode subassembly 200.

The through vias 206 can include one or more fill or filler materials.The one or more filler materials can act, along with the through vias206, to reduce a mismatch between an effective coefficient of thermalexpansion of the submount 202 and an effective coefficient of thermalexpansion of the laser diode 204. In turn, the one or more fillermaterials can act, along with the through vias 206, to reduce changes ofkink failure occurring in the laser diode subassembly 200 as a result ofmanufacturing the laser diode subassembly 200.

One or more filler materials disposed in the through vias 206 caninclude materials that are different from materials of a substrateforming the submount 202. Further, the one or more filler materials canincrease an effective coefficient of thermal expansion of the submount202 in order to reduce a mismatch with an effective coefficient ofthermal expansion of the laser diode 204. More specifically, the one ormore filler materials can have a coefficient of thermal expansiongreater than a substrate material of the submount 202, therebyincreasing an effective coefficient of thermal expansion of the submount202. The through vias 206, in combination with the one or more fillermaterials filled in the through vias 206, can be electricallynon-functional. More specifically, filler materials in the through vias206 do not have to serve as electrical connections to and from the laserdiode 204.

The submount 202 can be comprised of a Silicon substrate material. Inbeing fabricated from a Silicon substrate material, the submount 202 andthe through vias 206 can be fabricated using widely used Siliconprocessing techniques. As Silicon processing techniques are alreadyimplemented in semiconductor fabrication factories, new processes do nothave to be created and implemented to fabricate the laser diodesubassemblies 200 with the through vias 206 and fill materials. In turn,the laser diode subassemblies 200 can be easily fabricated at costssimilar to current fabrication costs of laser diode subassemblies.

The through vias 206 can be filled with Copper. As Copper is a widelyused material in semiconductor fabrication, its integration in the laserdiode subassembly 200 can allow for easy fabrication of the laser diodesubassembly 200 using current semiconductor fabrication equipment andmethods. By filling the through vias 206 with Copper, an effectiveoverall coefficient of thermal expansion of the submount 202 can beincreased. For example, the submount 202 can be fabricated from aSilicon substrate material having a coefficient of thermal expansion of3 ppm/K. Further in the example, the through vias 206 can be filled withCopper which has a coefficient of thermal expansion of 17 ppm/K.Accordingly the Copper can serve to increase an effective coefficient ofthermal expansion of the submount 202 above 3 ppm/K, in order to reducemismatch with an effective coefficient of thermal expansion of the laserdiode 204.

One or more properties of the through vias 206 can be selected to reducean amount of mismatch between an effective coefficient of thermalexpansion of the laser diode 204 and an effective coefficient of thermalexpansion of the submount 202. Example, properties of the through vias206 can include one or a combination of a number of the through vias206, dimensions of the through vias 206, and a density of the throughvias 206 in a volume of the submount 202. For example, a density of thethrough vias 206 in the submount 202 can be selected in order to matchan effective coefficient of thermal expansion of the submount 202 withan effective coefficient of thermal expansion of the laser diode 204.Further, properties of the through vias 206 can include properties offill materials in the through vias 206. Example properties of fillmaterials in the through vias 206 can include a type of fill material inthe through vias 206, an amount of fill material in the through vias206, and which specific through vias 206 include a fill material. Forexample, the through vias 206 can be filled with a material with athermal expansion coefficient to increase an effective thermal expansioncoefficient of the submount 202.

Additionally, one or more properties of the through vias 206 can includepositions of the through vias 206 in the submount 202 with respect to aposition on the submount 202 at which the laser diode 204 is mounted.More specifically, positions of the through vias 206 in the submount 202with respect to a position on the submount of the laser diode 204 can beselected to reduce mismatches in effective thermal expansioncoefficients between the submount 202 and the laser diode 204. Forexample, the through vias 206 can be disposed within the submount 202 inproximity to the laser diode 204 in order to reduce mismatches ineffective coefficient of thermal expansion between the laser diode 204and the submount 202.

Properties of the through vias 206 can be selected to reduce an amountof mismatch between effective coefficients of thermal expansion using afinite element analysis model. More specifically, a finite elementanalysis model can be developed and subsequently used to tune orotherwise reduce a mismatch between effective coefficients of thermalexpansion of the submount 202 and the laser diode 204. For example, afinite element analysis model of an amount of bow in a laser diode as afunction of an amount of mismatch between effective coefficients ofthermal expansion of a laser diode and a submount can be created, aswill be discussed in greater detail later. Subsequently, the finiteelement analysis model can be used to select properties of the throughvias 206, potentially including properties of one or more fillermaterials disposed in the through vias 206, for reducing an amount ofmismatch between effective coefficients of thermal expansion of thesubmount 202 and the laser diode 204.

Properties of the through vias 206 can be selected based oncharacteristics of the laser diode 204. More specifically, properties ofthe through vias 206 can be selected based on characteristics of thelaser diode 204 in order to reduce an amount of mismatch betweeneffective coefficients of thermal expansion of the submount 202 and thelaser diode 204. Examples of characteristics of the laser diode 204 usedto select properties of the through vias 206 can include dimensions ofthe laser diode 204, materials used in fabricating the laser diode 204,and an effective coefficient of thermal expansion of the laser diode204. For example, a number of through vias 206 disposed in the submount202 can be added as a function of a length of the laser diode 204.Further, properties of the through vias 206 can be selected based oncharacteristics of the laser diode 204 using a using a finite elementanalysis model. For example, a finite element analysis model can beapplied according to an effective coefficient of thermal expansion ofthe laser diode 204 in order to select properties of the through vias206.

Additionally, properties of the through vias 206 can be selected basedon characteristics of a material used to bond the laser diode 204 to thesubmount 202. More specifically, properties of the through vias 206 canbe selected based on characteristics of a material used to bond thelaser diode 204 to the submount 202 in order to reduce an amount ofmismatch between effective coefficients of thermal expansion of thesubmount 202 and the laser diode 204. Examples of characteristics of amaterial used to bond the laser diode 204 to the submount 202 caninclude material properties of the material, an amount of the materialused to bond the laser diode 204 to the submount 202, and position onthe submount 202 where the material is disposed. For example, a numberof through vias 206 disposed in the submount 202 can be added as afunction of a thickness of solder paste used to bond the laser diode 204to the submount 202. Further, properties of the through vias 206 can beselected based on characteristics of a material used to bond the laserdiode 204 to the submount 202 using a using a finite element analysismodel. For example, a finite element analysis model can be appliedaccording to a coefficient of thermal expansion of solder paste used inbonding the laser diode 204 to the submount 202 in order to selectproperties of the through vias 206.

FIG. 3 shows a view of a submount 300. The submount 300 includes aplurality of through vias 302. The through vias 302 extend though athickness of the submount 300 and are configured to reduce an amount ofmismatch between an effective coefficient of thermal expansion of thesubmount 300 and an effective coefficient of thermal expansion of alaser diode capable of being mounted on the submount 300. For example,the through vias 302 can raise an effective coefficient of thermalexpansion of the submount 300 in order to reduce mismatch between theeffective coefficient of thermal expansion of the submount 300 and alaser diode mounted on the submount 300. More specifically, by reducingthe amount of mismatch between effective coefficients of thermalexpansion, the through vias 302 can reduce chances that kink failure isintroduced in a laser diode mounted onto the submount 300 to create alaser diode subassembly.

The submount 300 can be fabricated from an applicable substratematerial. For example, the submount 300 can be fabricated from Silicon.The through vias 302 can be filled with one or more applicable fillmaterials. For example, the through vias 302 can be filled with Copperin order to increase an effective coefficient of thermal expansion ofthe submount 300.

The through vias 302 in the example submount 300 shown in FIG. 3 are notdisposed throughout the entire volume of the submount 300. Instead, thethrough vias 302 are disposed within a specific area 304 of the submount300. In selectively placing the through vias 302 within the specificarea 304 of the submount 300, the submount 300 and the correspondingthrough vias 302 can be manufactured cheaper as opposed to a submountwhere through vias are disposed throughout an entire volume of thesubmount. Further, in selectively placing the through vias 302, othercomponents can be mounted to or integrated as part of the submount 300,e.g. in area of the submount 300 lacking the through vias 302.

The specific area 304 can correspond to a position that a laser diodecan or will be mounted onto the submount 300. More specifically, thespecific area 304 can be a staging area of the submount 300 where alaser diode is placed and subsequently bonded to the submount 300.Accordingly, the through vias 302 can be disposed in the submount 300with respect to a position of a laser diode mounted to the submount 300.In disposing the through vias 302 in proximity to a position where alaser diode will be mounted, the through vias 302 are closer to the bondlocation of the laser diode, and can thereby further reduce an amount ofbow introduced in the laser diode through the process of manufacturing alaser diode subassembly.

FIG. 4 shows a view of another submount 400. The submount 400 includes aplurality of through vias 402. The through vias 402 extend though athickness of the submount 400 and are configured to reduce an amount ofmismatch between an effective coefficient of thermal expansion of thesubmount 400 and an effective coefficient of thermal expansion of alaser diode capable of being mounted on the submount 400. For example,the through vias 402 can raise an effective coefficient of thermalexpansion of the submount 400 in order to reduce mismatch between theeffective coefficient of thermal expansion of the submount 400 and alaser diode mounted on the submount 400. More specifically, by reducingthe amount of mismatch between effective coefficients of thermalexpansion, the through vias 402 can reduce chances that kink failure isintroduced in a laser diode mounted on the submount 400 to create alaser diode subassembly.

The submount 400 can be fabricated from an applicable substratematerial. For example, the submount 400 can be fabricated from Silicon.The through vias 402 can be filled with one or more applicable fillmaterials. For example, the through vias 402 can be filled with Copperin order to increase an effective coefficient of thermal expansion ofthe submount 400. The through vias 402 are disposed throughout an entirevolume of the submount 400. By being disposed through an entire volumeof the submount 400, the through vias 402 can ensure that a mismatchbetween effective coefficients of thermal expansion of the submount 400and laser diodes mounted thereon is reduced across the entire submount400.

FIG. 5 shows a graph of normalized bow observed in laser diodesubassemblies as a function of effective coefficient of thermalexpansion ratio (herein referred to as “CTE ratio”). A CTE ratioincludes a ratio of an effective coefficient of thermal expansion of asubmount and an effective coefficient of thermal expansion of one ormore laser diodes mounted thereon. The bow is normalized with respect toa baseline laser diode subassembly. The baseline laser diode subassemblycan include a submount that lacks through vias. As the baseline laserdiode subassembly has the greatest mismatch in effective coefficients ofthermal expansion. It has the lowest CTE ratio, at 0.29, and the highestamount of bow.

Normalized bow in two sets of laser diode subassemblies is illustratedin FIG. 5. In particular the first set, called the “TSVs only in stagearea” set, includes laser diode subassemblies with submounts only havingthrough vias in proximity to laser diodes, such as the submount shown inFIG. 3. The second set, called the “TSVs in full submount” set, includeslaser diode subassemblies with submounts having through vias throughoutthe submounts, such as the submount shown in FIG. 4.

In both sets, the through vias in the submounts are 50 μm diameterthrough vias. Further the CTE ratio in the sets is varied across laserdiode subassemblies by varying a number of through vias, otherwisereferred to as pitch. For example, the 200 μm pitch laser diodesubassembly has a CTE ratio of 0.35, while the 80 μm pitch laser diodesubassembly has a CTE ration of 0.66 corresponding to increase numbersof through vias per unit volume. In both sets the amount of normalizedbow decreases as the CTE ratio increases until a certain point, wherethe laser diode actually begins to bow in the opposite direction,corresponding to negative normalized bow. Specifically, in both sets,the 80 μm pitch laser subassemblies exhibit negative normalized bow.Accordingly, there exists a CTE ratio where bow is absent from a laserdiode subassembly, e.g. between the 100 μm pitch laser diodesubassemblies and the 80 μm pitch laser diode subassemblies.

FIG. 6 illustrates a flowchart for an example method of manufacturinglaser diode assemblies that reduces chances of introducing kink failurein the laser diodes. The method shown in FIG. 6 is provided by way ofexample, as there are a variety of ways to carry out the method.Additionally, while the example method is illustrated with a particularorder of blocks, those of ordinary skill in the art will appreciate thatFIG. 6 and the blocks shown therein can be executed in any order and caninclude fewer or more blocks than illustrated. Additionally, each blockshown in FIG. 6 can represent one or more steps, processes, methods orroutines in the method.

At step 600, a submount and a laser diode to mount to the submount areidentified. The laser diode can include an applicable laser diodemanufactured from applicable materials. For example, the laser diode canbe an InP laser diode. Further, the submount can be fabricated from anapplicable substrate material, such as Silicon. In using a Siliconsubstrate material, the submount can be fabricated, e.g. with throughholes, using widely adopted and readily available semiconductorprocessing equipment.

At step 602, properties of one or more through vias including fillmaterials different from a substrate forming the submount are selected.The properties of the one or more through vias can be selected to reducean amount of effective thermal expansion coefficient mismatch betweenthe submount and the laser diode. In turn, the one or more properties ofthe through vias can be selected to reduce an amount of bow introducedin the laser diode through mounting of the laser diode to the submount,thereby reducing a change of kink failure occurring in the laser diode.The properties of the one or more through vias can be selected throughapplication of a finite element analysis model of an amount of bow in alaser diode as a function of an amount of mismatch between coefficientsof thermal expansion of the diode and a submount.

At step, 604, the submount with the one or more through vias isfabricated according to the selected properties of the one or morethrough vias. More specifically, the one or more through vias can beadded to the submount according to the selected properties of the one ormore through vias, e.g. using applicable semiconductor processingtechniques such as Silicon semiconductor processing techniques.Subsequently, the one or more through vias can be filled with one ormore filler materials according to the selected properties of the one ormore through vias, e.g. using applicable semiconductor processingtechniques.

At step 606, the laser diode is mounted to the submount to form a laserdiode subassembly. The laser diode can be mounted to the submountaccording to an applicable manufacturing processing for bonding a diodeto a submount, such as the manufacturing processes described herein. Forexample an AuSn solder can be applied to the submount and the laserdiode can be placed on the submount at points where the solder isdisposed on the submount. Subsequently, the solder can be heated to 280°C. to melt the solder and the entire subassembly can be cooled down inorder to solidify the solder and subsequently mount the laser diode tothe submount.

FIG. 7 illustrates a flowchart for an example method of developing afinite element analysis model used to reduce an amount of bow introducedin laser diodes of laser diode subassemblies through manufacturing ofthe subassemblies. The method shown in FIG. 7 is provided by way ofexample, as there are a variety of ways to carry out the method.Additionally, while the example method is illustrated with a particularorder of blocks, those of ordinary skill in the art will appreciate thatFIG. 7 and the blocks shown therein can be executed in any order and caninclude fewer or more blocks than illustrated. Additionally, each blockshown in FIG. 7 can represent one or more steps, processes, methods orroutines in the method.

At step 700, an amount of bow in a laser diode submount assembly lackingthrough vias in a submount of the assembly are observed. Further, atstep 700, amounts of bow in laser diode submount assemblies withsubmounts having through vias with varying through via properties areobserved. The amounts of bow observed in the laser diode assemblies canrefer to an amount of bow in laser diodes of the laser diode assemblies.Further, the bow can be introduced to the laser diode assemblies duringmanufacturing the laser diode subassemblies. More specifically, the bowcan be introduced in the laser diode assemblies as a result ofmismatches between effective coefficients of thermal expansion of thelaser diodes and the submounts in the laser diode submount assemblies.

At step 702, a finite element analysis model of an amount of bow in alaser diode as a function of an amount of mismatch between effectivecoefficients of thermal expansion of a laser diode and a submount can bedeveloped using the observed bow. More specifically, the finite elementanalysis model can be developed based on the amount of bow observed inthe submount assembly lacking through vias in the submount and thesubmount assemblies having through vias with varying through viaproperties in the submounts. The finite element analysis model can alsobe developed based on either or both properties of the laser diode andproperties of a material used to bond the laser diode to a submount. Forexample, the finite element analysis model can be developed to accountfor bow based on dimensions of a laser diode. The finite elementanalysis model can be used to select via properties of one or more viasin a submount of a laser diode assembly for purposes of reducing anamount of mismatch between an effective coefficient of thermal expansionof the submount and an effective coefficient of thermal expansion of alaser diode in the assembly.

FIG. 8 illustrates a computing system architecture 800 wherein thecomponents of the system are in electrical communication with each otherusing a connection 805, such as a bus. The computing system architecture800 can be configured to select through via properties of one or morethrough vias in a submount for purposes of reducing an amount ofmismatch between an effective coefficient of thermal expansion of asubmount and an effective coefficient of thermal expansion of a laserdiode in an assembly. Additionally, the computing system 800 can be usedto develop a finite element analysis model, such as described in theflowchart shown in FIG. 7

Exemplary system 800 includes a processing unit (CPU or processor) 810and a system connection 805 that couples various system componentsincluding the system memory 815, such as read only memory (ROM) 720 andrandom access memory (RAM) 825, to the processor 810. The system 800 caninclude a cache of high-speed memory connected directly with, in closeproximity to, or integrated as part of the processor 810. The system 800can copy data from the memory 815 and/or the storage device 830 to thecache 812 for quick access by the processor 810. In this way, the cachecan provide a performance boost that avoids processor 810 delays whilewaiting for data. These and other modules can control or be configuredto control the processor 810 to perform various actions. Other systemmemory 815 may be available for use as well. The memory 815 can includemultiple different types of memory with different performancecharacteristics. The processor 810 can include any general purposeprocessor and a hardware or software service, such as service 1 832,service 2 834, and service 3 836 stored in storage device 830,configured to control the processor 810 as well as a special-purposeprocessor where software instructions are incorporated into the actualprocessor design. The processor 810 may be a completely self-containedcomputing system, containing multiple cores or processors, a bus, memorycontroller, cache, etc. A multi-core processor may be symmetric orasymmetric.

To enable user interaction with the computing device 800, an inputdevice 845 can represent any number of input mechanisms, such as amicrophone for speech, a touch-sensitive screen for gesture or graphicalinput, keyboard, mouse, motion input, speech and so forth. An outputdevice 835 can also be one or more of a number of output mechanismsknown to those of skill in the art. In some instances, multimodalsystems can enable a user to provide multiple types of input tocommunicate with the computing device 800. The communications interface840 can generally govern and manage the user input and system output.There is no restriction on operating on any particular hardwarearrangement and therefore the basic features here may easily besubstituted for improved hardware or firmware arrangements as they aredeveloped.

Storage device 830 is a non-volatile memory and can be a hard disk orother types of computer readable media which can store data that areaccessible by a computer, such as magnetic cassettes, flash memorycards, solid state memory devices, digital versatile disks, cartridges,random access memories (RAMs) 825, read only memory (ROM) 820, andhybrids thereof.

The storage device 830 can include services 832, 834, 836 forcontrolling the processor 810. Other hardware or software modules arecontemplated. The storage device 830 can be connected to the systemconnection 805. In one aspect, a hardware module that performs aparticular function can include the software component stored in acomputer-readable medium in connection with the necessary hardwarecomponents, such as the processor 810, connection 805, output device835, and so forth, to carry out the function.

For clarity of explanation, in some instances the present technology maybe presented as including individual functional blocks includingfunctional blocks comprising devices, device components, steps orroutines in a method embodied in software, or combinations of hardwareand software.

In some embodiments the computer-readable storage devices, mediums, andmemories can include a cable or wireless signal containing a bit streamand the like. However, when mentioned, non-transitory computer-readablestorage media expressly exclude media such as energy, carrier signals,electromagnetic waves, and signals per se.

Methods according to the above-described examples can be implementedusing computer-executable instructions that are stored or otherwiseavailable from computer readable media. Such instructions can comprise,for example, instructions and data which cause or otherwise configure ageneral purpose computer, special purpose computer, or special purposeprocessing device to perform a certain function or group of functions.Portions of computer resources used can be accessible over a network.The computer executable instructions may be, for example, binaries,intermediate format instructions such as assembly language, firmware, orsource code. Examples of computer-readable media that may be used tostore instructions, information used, and/or information created duringmethods according to described examples include magnetic or opticaldisks, flash memory, USB devices provided with non-volatile memory,networked storage devices, and so on.

Devices implementing methods according to these disclosures can comprisehardware, firmware and/or software, and can take any of a variety ofform factors. Typical examples of such form factors include laptops,smart phones, small form factor personal computers, personal digitalassistants, rackmount devices, standalone devices, and so on.Functionality described herein also can be embodied in peripherals oradd-in cards. Such functionality can also be implemented on a circuitboard among different chips or different processes executing in a singledevice, by way of further example.

The instructions, media for conveying such instructions, computingresources for executing them, and other structures for supporting suchcomputing resources are means for providing the functions described inthese disclosures.

Although a variety of examples and other information was used to explainaspects within the scope of the appended claims, no limitation of theclaims should be implied based on particular features or arrangements insuch examples, as one of ordinary skill would be able to use theseexamples to derive a wide variety of implementations. Further andalthough some subject matter may have been described in languagespecific to examples of structural features and/or method steps, it isto be understood that the subject matter defined in the appended claimsis not necessarily limited to these described features or acts. Forexample, such functionality can be distributed differently or performedin components other than those identified herein. Rather, the describedfeatures and steps are disclosed as examples of components of systemsand methods within the scope of the appended claims.

Claim language reciting “at least one of” refers to at least one of aset and indicates that one member of the set or multiple members of theset satisfy the claim. For example, claim language reciting “at leastone of A and B” means A, B, or A and B.

What is claimed is:
 1. A method comprising: observing a factor in alaser diode submount assembly lacking through vias in a submount of thelaser diode submount assembly and laser diode submount assemblies withsubmounts including through vias with one or more fill materials; andselecting, via a finite element analysis model of the factor, one ormore properties of one or more through vias in one or more submountsconfigured to receive one or more laser diodes to reduce an amount ofmismatch between an effective coefficient of thermal expansion of theone or more laser diodes and an effective coefficient of thermalexpansion of the one or more submounts.
 2. The method of claim 1,further comprising: generating the model as a function of the amount ofmismatch based on the factor.
 3. The method of claim 2, wherein thefactor is an amount of bow of the laser diode submount assembly.
 4. Themethod of claim 3, wherein the one or more fill materials includevarying through via properties.
 5. The method of claim 1, whereinreducing the amount of mismatch between the effective coefficient ofthermal expansion of the one or more laser diodes and the effectivecoefficient of thermal expansion of the one or more submounts reduces anamount of bow in the one or more laser diodes caused by a process ofcooling down the one or more laser diodes and the one or more submountsafter bonding the one or more laser diodes onto the one or moresubmounts.
 6. The method of claim 5, wherein reducing the amount of bowin the one or more laser diodes reduces a chance of kink failure in theone or more laser diodes corresponding to distortions in gratings of theone or more laser diodes caused by the amount of bow in the one or morelaser diodes.
 7. The method of claim 1, wherein the one or moreproperties of the one or more through vias include a number of the oneor more through vias, dimensions of the one or more through vias, and/ora density of the one or more through vias in a volume of the one or moresubmounts.
 8. The method of claim 7, wherein the one or more propertiesof the one or more through vias include the one or more fill materials.9. The method of claim 8, wherein the one or more fill materials have acoefficient of thermal expansion greater than a coefficient of thermalexpansion of a material of the one or more submounts to increase theeffective coefficient of thermal expansion of the one or more submounts.10. The method of claim 1, wherein the one or more properties of the oneor more through vias include positions of the one or more through viasin the one or more submounts relative to positions of the one or morelaser diodes mounted to the one or more submounts.
 11. A methodcomprising: observing a factor in a laser diode submount assemblylacking through vias in a submount of the laser diode submount assemblyand laser diode submount assemblies with submounts including throughvias with one or more fill materials; and developing a finite elementanalysis model of the factor in a laser diode as a function of an amountof mismatch between effective coefficients of thermal expansion of thelaser diode and the submount based on the factor, the model enablingselection of one or more properties of one or more through vias in oneor more submounts configured to receive one or more laser diodes toreduce an amount of mismatch between an effective coefficient of thermalexpansion of the one or more laser diodes and an effective coefficientof thermal expansion of the one or more submounts.
 12. The method ofclaim 11, further comprising: selecting, via the model, one or moreproperties of one or more through vias in one or more submountsconfigured to receive one or more laser diodes to reduce the amount ofmismatch.
 13. The method of claim 12, wherein the factor is an amount ofbow of the laser diode submount assembly.
 14. The method of claim 13,wherein the one or more fill materials include varying through viaproperties.
 15. The method of claim 11, wherein reducing the amount ofmismatch between the effective coefficient of thermal expansion of theone or more laser diodes and the effective coefficient of thermalexpansion of the one or more submounts reduces an amount of bow in theone or more laser diodes caused by a process of cooling down the one ormore laser diodes and the one or more submounts after bonding the one ormore laser diodes onto the one or more submounts.
 16. The method ofclaim 15, wherein reducing the amount of bow in the one or more laserdiodes reduces a chance of kink failure in the one or more laser diodescorresponding to distortions in gratings of the one or more laser diodescaused by the amount of bow in the one or more laser diodes.
 17. Themethod of claim 11, wherein the one or more properties of the one ormore through vias include a number of the one or more through vias,dimensions of the one or more through vias, and/or a density of the oneor more through vias in a volume of the one or more submounts.
 18. Themethod of claim 17, wherein the one or more properties of the one ormore through vias include the one or more fill materials.
 19. The methodof claim 18, wherein the one or more fill materials have a coefficientof thermal expansion greater than a coefficient of thermal expansion ofa material of the one or more submounts to increase the effectivecoefficient of thermal expansion of the one or more submounts.
 20. Themethod of claim 11, wherein the one or more properties of the one ormore through vias include positions of the one or more through vias inthe one or more submounts relative to positions of the one or more laserdiodes mounted to the one or more submounts.